Commit 7717246b authored by Alexey Mednyy's avatar Alexey Mednyy 🆖

added initial mx53shm devicetree

parent 2b4015e9
......@@ -275,6 +275,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-mba53.dtb \
imx53-qsb.dtb \
imx53-qsrb.dtb \
imx53-shm.dtb \
imx53-smd.dtb \
imx53-tx53-x03x.dtb \
imx53-tx53-x13x.dtb \
......
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "imx53.dtsi"
#include <dt-bindings/pwm/pwm.h>
/ {
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x70000000 0x20000000>;
};
// display0: display@di0 {
// compatible = "fsl,imx-parallel-display";
// interface-pix-fmt = "rgb565";
// pinctrl-names = "default";
// pinctrl-0 = <&pinctrl_ipu_disp0>;
// status = "enabled";
// display-timings {
// claawvga {
// native-mode;
// clock-frequency = <39682>;
// hactive = <640>;
// vactive = <480>;
// hback-porch = <60>;
// hfront-porch = <40>;
// vback-porch = <30>;
// vfront-porch = <5>;
// hsync-len = <60>;
// vsync-len = <10>;
// };
// };
//
// port {
// display0_in: endpoint {
// remote-endpoint = <&ipu_di0_disp0>;
// };
// };
// };
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power Button";
gpios = <&gpio3 4 0>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_3p2v: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "3P2V";
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3200000>;
regulator-always-on;
};
reg_usb_vbus: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 8 0>;
enable-active-high;
};
};
sound {
compatible = "fsl,imx53-qsb-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx53-qsb-sgtl5000";
ssi-controller = <&ssi2>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias";
mux-int-port = <2>;
mux-ext-port = <3>;
};
// backlight {
// compatible = "pwm-backlight";
// pwms = <&pwm2 0 3000>;
// brightness-levels = <0 4 8 16 32 64 128 255>;
// default-brightness-level = <6>;
// };
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
status = "okay";
};
// &ipu_di0_disp0 {
// remote-endpoint = <&display0_in>;
// };
&owire{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_owire>;
};
&ssi2 {
status = "okay";
};
&ldb {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds0>;
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&lvds_timing0>;
lvds_timing0: shmvga {
clock-frequency = <65000000>;
hactive = <640>;
vactive = <480>;
hback-porch = <60>;
hfront-porch = <40>;
vback-porch = <30>;
vfront-porch = <5>;
hsync-len = <60>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-on-flash-bbt;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx53-qsb {
pinctrl_hog: hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
// MX53_PAD_GPIO_8__GPIO1_8 0x80000000
MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
// MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B 0x80000000
// MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
// MX53_PAD_EIM_WAIT__GPIO5_0 0x80000000
// MX53_PAD_EIM_CS0__GPIO2_23 0x80000000
// MX53_PAD_EIM_DA0__GPIO3_0 0x80000000
MX53_PAD_EIM_DA1__GPIO3_1 0x80000000
// MX53_PAD_EIM_DA2__GPIO3_2 0x80000000
// MX53_PAD_EIM_DA3__GPIO3_3 0x80000000
MX53_PAD_EIM_DA4__GPIO3_4 0x80000000
MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
MX53_PAD_GPIO_10__GPIO4_0 0x80000000
MX53_PAD_GPIO_16__GPIO7_11 0x80000000
// MX53_PAD_NANDF_CS1__GPIO6_14 0x80000000
// MX53_PAD_NANDF_CS2__GPIO6_15 0x80000000
// MX53_PAD_GPIO_5__GPIO1_5 0x80000000
// MX53_PAD_DISP0_DAT4__CSPI_SS1 0x80000000
>;
};
pinctrl_nand: nandgrp {
fsl,pins = <
MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 0x4
MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 0x4
MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
>;
};
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 0x80000000
MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 0x80000000
MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 0x80000000
MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 0x80000000
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000
MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000
>;
};
pinctrl_owire: owiregrp {
fsl,pins = <
MX53_PAD_GPIO_18__OWIRE_LINE 0x80000000
>;
};
// pinctrl_ipu_disp0: ipudisp0grp {
// fsl,pins = <
// // MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
// // MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
// // MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
// // MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
// // MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
// // MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
// // MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
// // MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
// // MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
// // MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
// // MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
// // MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
// // MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
// // MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
// // MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
// // MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
// // MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
// // MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
// // MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
// // MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
// // MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
// // MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
// // MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
// // MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
// // MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
// // MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
// // MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
// // MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
// >;
// };
// pinctrl_vga_sync: vgasync-grp {
// fsl,pins = <
// /* VGA_HSYNC, VSYNC with max drive strength */
// MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
// MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
// >;
// };
pinctrl_uart1: uart1grp {
fsl,pins = <
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 0x1e4
MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 0x1e4
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
>;
};
pinctrl_kpp: kppgrp {
fsl,pins = <
// MX53_PAD_KEY_COL0__KPP_COL_0 0x80000000
// MX53_PAD_KEY_COL1__KPP_COL_1 0x80000000
// MX53_PAD_KEY_COL2__KPP_COL_2 0x80000000
// MX53_PAD_KEY_COL3__KPP_COL_3 0x80000000
// MX53_PAD_KEY_COL4__KPP_COL_4 0x80000000
// MX53_PAD_GPIO_19__KPP_COL_5 0x80000000
// MX53_PAD_SD2_DATA3__KPP_COL_6 0x80000000
// MX53_PAD_GPIO_4__KPP_COL_7 0x80000000
// MX53_PAD_KEY_ROW1__KPP_ROW_1 0x80000000
// MX53_PAD_KEY_ROW2__KPP_ROW_2 0x80000000
// MX53_PAD_KEY_ROW3__KPP_ROW_3 0x80000000
// MX53_PAD_KEY_ROW4__KPP_ROW_4 0x80000000
// MX53_PAD_SD2_CMD__KPP_ROW_5 0x80000000
// MX53_PAD_GPIO_2__KPP_ROW_6 0x80000000
// MX53_PAD_CSI0_DAT9__KPP_ROW_7 0x80000000
>;
};
pinctrl_lvds0: lvds0grp {
fsl,pins = <
MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
>;
};
// pinctrl_lvds1: lvds1grp {
// fsl,pins = <
// MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
// MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
// MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
// MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
// MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
// >;
// };
};
};
// &tve {
// pinctrl-names = "default";
// pinctrl-0 = <&pinctrl_vga_sync>;
// fsl,tve-mode = "vga";
// fsl,hsync-pin = <4>;
// fsl,vsync-pin = <6>;
// status = "okay";
// };
// &kpp{
// pinctrl-names = "default";
// pinctrl-0 = <&pinctrl_kpp>;
// linux,keymap = <
// 0x00000010
// 0x00010011
// 0x00020012
// 0x00030013
// 0x00040014
// 0x00050015
// 0x00060016
// 0x00070017
// 0x0100001e
// 0x0101001f
// 0x01020020
// 0x01030021
// 0x01040022
// 0x01050023
// 0x01060024
// 0x01070025
// 0x0200002c
// 0x0201002d
// 0x0202002e
// 0x0203002f
// 0x02040030
// 0x02050031
// 0x02060032
// >;
//
// status = "okay";
// };
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p2v>;
VDDIO-supply = <&reg_3p2v>;
clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
// &sata {
// status = "okay";
// };
&vpu {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_vbus>;
phy_type = "utmi";
status = "okay";
};
&usbotg {
dr_mode = "peripheral";
status = "okay";
};
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
memgpu: /memreserve/ 0xb0000000 0x04000000;
#include "imx53-shm-common.dtsi"
/ {
model = "Freescale i.MX53 SHM";
compatible = "fsl,imx53-qsrb", "fsl,imx53";
backlight0: backlight0 {
compatible = "pwm-backlight";
pwms = <&pwm2 0 500000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100
>;
default-brightness-level = <50>;
};
};
&iomuxc {
i2c1 {
/* open drain */
pinctrl_i2c1_qsrb: i2c1grp-1 {
fsl,pins = <
MX53_PAD_EIM_D28__I2C1_SDA 0x400001ec
MX53_PAD_EIM_D21__I2C1_SCL 0x400001ec
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX53_PAD_CSI0_DAT10__GPIO5_28 0x100 /* IRQ */
>;
};
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_qsrb>;
status = "okay";
pmic: mc34708@8 {
compatible = "fsl,mc34708";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
fsl,mc13xxx-uses-rtc;
fsl,mc13xxx-uses-touch;
fsl,mc13xxx-uses-adc;
reg = <0x08>;
interrupt-parent = <&gpio5>;
interrupts = <28 4>;
regulators {
sw1_reg: sw1a {
regulator-name = "SW1";
regulator-min-microvolt = <650000>;
regulator-max-microvolt = <1437500>;
regulator-boot-on;
regulator-always-on;